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Free delivery, every order. Want a bulk deal or can't find what you need? Email support@pmdway.com now!

FT245 USB to Parallel FIFO Breakout Board

$12.95
SKU 69341401

Now available from PMD Way are these fully-assembled FT245 USB to Parallel FIFO Breakout Boards with free delivery worldwide. Used to provide a USB to parallel FIFO interface.

Board is fitted with a mini USB socket on one side and full breakout of pins using standard 0.1"/2.54mm header pins. Onboard jumper to select between 3.3V and 5V operation. 

Free delivery, worldwide.

More information:

  • Single chip USB to parallel FIFO bidirectional data transfer interface.
  • Entire USB protocol handled on the chip - No USB-specific firmware programming required.
  • Simple interface to MCU / PLD / FPGA logic with simple 4-wire handshake interface.
  • Data transfer rate to 1 Megabyte / second - D2XX Direct Drivers.
  • Data transfer rate to 300 kilobyte / second - VCP Drivers.
  • 256 byte receive buffer and 128 byte transmit buffer utilising buffer smoothing technology to allow for high data throughput.

Datasheet - FT245 (.pdf)

Pinouts:

Name Type Description
VCCIO Power supply It can be used to supply FT245 chip or external devices. 3.3V or 5V supply can be set by the onboard jumper.
GND Power supply Ground
D0~D7 Input/Output FIFO data bus bit 0 ~ bit 7
NC NC No Connection
RST# Input Can be used by an external device to reset the FT245.
PWREN# Output Goes low after the device is configured by USB, then high during USB suspend.
TXE# Output When high, do not write data into the FIFO. When low, data can be written into the FIFO by strobing WR high, then low.
RXF# Output When high, do not read data from the FIFO. When low, there is data available in the FIFO which can be read by strobing RD# low, then high again.
WR# Input Writes the data byte on the D0...D7 pins into the transmit FIFO buffer when WR goes from high to low.
RD# Input Enables the current FIFO data byte on D0...D7 when low. Fetched the next FIFO data byte (if available) from the receive FIFO buffer when RD# goes from high to low